TLV320AIC3101IRHBR

Product Summary

The TLV320AIC3101IRHBR is a low-power stereo audio codec with stereo headphone amplifier, as well as multiple inputs and outputs that are programmable in single-ended or fully differential configurations. Extensive register-based power control is included, enabling stereo 48-kHz DAC playback as low as 14mW from a 3.3-V analog supply, making it ideal for portable battery-powered audio and telephony applicaitons. The applicaitons of the TLV320AIC3101IRHBR include Digital Cameras and Smart Cellular Phones.

Parametrics

TLV320AIC3101IRHBR absolute maximum ratings: (1)AVDD to AVSS, DRVDD to DRVSS: – 0.3 to 3.9 V; (2)AVDD to DRVSS: – 0.3 to 3.9 V; (3)IOVDD to DVSS: – 0.3 to 3.9 V; (4)DVDD to DVSS: – 0.3 to 2.5 V; (5)AVDD to DRVDD: – 0.1 to 0.1 V; (6)Digital input voltage to DVSS: – 0.3 to IOVDD + 0.3 V; (7)Analog input voltage to AVSS: – 0.3 to AVDD + 0.3 V; (8)Operating temperature range: – 40 to 85℃; (9)Storage temperature range: – 65 to 105℃; (10)T J Max Junction temperature: 105℃; (11)Power dissipation: 0.5 W; (12)RθJA Thermal impedance: 44℃/W.

Features

TLV320AIC3101IRHBR features: (1)Stereo Audio DAC: 102-dBA Signal-to-Noise Ratio; 16/20/24/32-Bit Data; Supports SampleRates From 8 kHz to 96 kHz; 3D/ Bass/ Treble/ EQ/ DeEmphasis Effects; Flexible Power Saving Modes and Performance are Available; (2)Stereo Audio ADC: 92-dBA Signal-to-Noise Ratio; Supports Sample Rates From 8 kHz to 96 kHz; Digital Signal Processing and Noise Filtering Available During Record; (3)Six Audio Input Pins: One Stereo Pair of Single-Ended Inputs; One Stereo Pair of Fully Differential Inputs; (4)Six Audio Output Drivers: Stereo Fully Differential or Single-Ended Headphone Drivers; Fully Differential Stereo Line Outputs; Stereo 8- Ω, 500 mW/Channel Speaker Drive Capability; (5)Low Power: 14-mW Stereo 48-kHz Playback With 3.3-V Analog Supply; (6)Ultralow-Power Mode With Passive Analog Bypass; (7)Programmable Input/Output Analog Gains; (8)Automatic Gain Control (AGC) for Record; (9)Programmable Microphone Bias Level; (10)Programmable PLL for Flexible Clock Generation; (11)I2C Control Bus; (12)Audio Serial Data Bus Supports I2S,Left/Right-Justified, DSP, and TDM Modes; (13)Extensive Modular Power Control; (14)Power Supplies: Analog: 2.7 V – 3.6 V; Digital Core: 1.525 V – 1.95 V; Digital I/O: 1.1 V – 3.6 V; (15)Package: 5-mm × 5-mm 32-Pin QFN.

Diagrams