XCV400E-6FG676C

Product Summary

The XCV400E-6FG676C is a Field Programmable Gate Array. It delivers high-performance, high-capacity programmable logic solutions. Dramatic increases in silicon efficiency result from optimizing the new architecture for place-and-route efficiency and exploiting an aggressive 6-layer metal 0.18mm CMOS process. These advances make XCV400E-6BGG432C powerful and flexible alternatives to mask-programmed gate arrays. The Virtex-E family includes the nine members. Building on experience gained from Virtex FPGAs, the XCV400E-6FG676C is an evolutionary step forward in programmable logic design. Combining a wide variety of programmable system features, a rich hierarchy of fast, flexible interconnect resources, and advanced process technology, the XCV400E-6FG676C delivers a high-speed and high-capacity programmable logic solution that enhances design flexibility while reducing time-to-market.

Parametrics

XCV400E-6FG676C absolute maximum ratings: (1)System Gates: 569,952; (2)Logic Gates: 129,600; (3)CLB Array: 40 x 60; (4)Logic Cells: 10,800; (5)Differential I/O Pairs: 183; (6)User I/O: 404; (7)BlockRAM Bits: 163,840; (8)Distributed RAM Bits: 153,600.

Features

XCV400E-6FG676C features: (1)Fast, High-Density 1.8 V FPGA Family; (2)Densities from 58 k to 4 M system gates; (3)130 MHz internal performance (four LUT levels); (4)Designed for low-power operation; (5)PCI compliant 3.3 V, 32/64-bit, 33/ 66-MHz ; (6)Highly Flexible SelectI/O+? Technology; (7)Supports 20 high-performance interface standards; (8)Up to 804 singled-ended I/Os or 344 differential I/O pairs for an aggregate bandwidth of > 100 Gb/s; (9)Proprietary High-Performance SelectLink Technology; (10)Double Data Rate (DDR) to Virtex-E link; (11)Web-based HDL generation methodology; (12)SRAM-Based In-System Configuration; (13)Unlimited re-programmability; (14)Advanced Packaging Options: 0.8 mm Chip-scale, 1.0 mm BGA, 1.27 mm BGA, HQ/PQ; (15)0.18 mm 6-Layer Metal Process; (16)100% Factory Tested.

Diagrams